Back to Blog
Hardware April 27, 2026 5 min read

Google Signs Marvell as Its Third Custom AI Chip Partner to Co-Design MPU and Inference TPU

Google confirmed Marvell Technology as a new chip co-design partner at Cloud Next 2026, adding a memory processing unit and inference-optimized TPU to its custom silicon portfolio alongside Broadcom and MediaTek.

Google Signs Marvell as Its Third Custom AI Chip Partner to Co-Design MPU and Inference TPU

Google has confirmed Marvell Technology as its third custom AI chip co-design partner. The deal, first reported by The Information on April 20 and confirmed at Google Cloud Next 2026, covers two chips: a memory processing unit (MPU) targeting inference memory bandwidth bottlenecks and a new inference-optimized TPU variant. Marvell shares surged 7% on the initial report. Broadcom shares fell.

Google’s custom silicon strategy now involves three partners, each assigned to distinct workload profiles:

  • Broadcom — training TPUs (long-standing relationship)
  • MediaTek — Zebrafish inference TPU
  • Marvell — MPU for memory bandwidth and a second inference TPU variant

The addition of Marvell is not redundancy. Inference at scale runs into two bottlenecks: compute and memory bandwidth. Large context windows, multi-modal processing, and speculative decoding all hit the memory wall before they exhaust compute capacity. An MPU co-designed specifically for Google’s inference stack addresses that bottleneck directly, without the compromises of repurposing a general-purpose chip architecture.

The market reaction tells the underlying story. Broadcom built its recent valuation narrative largely on Google TPU co-design revenue. Marvell entering the same conversation signals that Google is deliberately splitting its silicon design wallet — a supply chain diversification ahead of multi-gigawatt TPU deployments planned for 2027. No single chip partner absorbs that volume without introducing supply risk, and Google learned from the NVIDIA GPU allocation scramble of 2023 and 2024.

The Cloud Next timing is significant context. At the same event, Google announced its 8th-generation TPU family: TPU 8t for training (3x compute versus the prior generation) and TPU 8i for inference (80% better price-performance per dollar). These are production chips for 2026 workloads. The Marvell co-developments are separate programs targeting 2027 deployments — a staggered roadmap that keeps Google’s competitive position advancing on two timescales simultaneously.

For cloud developers and AI infrastructure teams, the calculus is straightforward: Google’s inference costs on GCP are set to drop materially in 2027 when the Marvell-designed chips reach production. Memory-bound workloads — long-context inference, multimodal models, retrieval-augmented generation with large corpora — will see the biggest unit economics improvement.

The custom silicon race is reshaping cloud pricing dynamics faster than most expected. Google has three chip partners. AWS has Trainium and Inferentia. Microsoft has its in-house Maia chips. NVIDIA’s data center division is building its own cloud. Meta designed MTIA. The era where cloud inference economics were set by NVIDIA GPU allocations is ending, and the developers who understand the new cost curves will make better architectural decisions for the next wave of AI applications.

Google Marvell custom silicon TPU AI chips cloud computing